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Involved in the Digital IP design and verification, joins the SoC development for 8 bits, 32 bits MCU.Doing RTL coding, integration and verification.Doing simulation in Gate Level, transistor Level (full-chip spice).Create function test patterns for testing engineering.Requirements:Bachelors or Master Degree or University Degree or equivalent from Electronic, Electrical or Computer Science.&(v~" * 2 8  $ D F N P X Z d l n Ƕ{{{h{%htZ5B*CJOJQJaJo(ph333$h+hu05B*CJOJaJph333(h+hu05B*CJOJQJaJph333%h+hu0B*CJOJQJaJph333!h+hu0B*CJOJaJph333$hE*hE*5B*CJOJaJph333!hPM5B*CJOJaJo(ph333'hE*hE*5B*CJOJaJo(ph333'($ 0M(_`nVXt@ & Fhdgdsdgds & Fhdgd~Rdgd~Rgdu0$a$gdE* .0_`n̽sbRsbPbChX5CJOJQJaJUh+hs5CJOJQJaJ h+hXCJOJPJQJaJh+h~R5CJOJQJaJh)5CJOJQJaJh*5CJOJQJaJh+hX5CJOJQJaJh+h{05CJOJQJaJhPM5CJOJQJaJo(!h@`5B*CJOJaJo(ph333'h@`h@`5B*CJOJaJo(ph333hu0B*CJOJaJph333Well communication and Inter-person skill.Good language skill in English, Pass CET-6.Have knowledge about EDA simulation and synthesis tool as well as VLSI design flow. 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